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  1 lt1995 1995fb C + 4k 4k C + 2k 2k 1k input range C15v to 15v 1k 4k lt1995 C15v 1995 ta01a 15v out ref m1 m2 m4 p1 p2 p4 4k , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 32mhz, 1000v/ s gain selectable amplifier internal gain setting resistors pin configurable as a difference amplifier, inverting and noninverting amplifier difference amplifier: gain range 1 to 7 cmrr > 65db noninverting amplifier: gain range 1 to 8 inverting amplifier: gain range ? to ? gain error: <0.2% slew rate: 1000v/ s bandwidth: 32mhz (gain = 1) op amp input offset voltage: 2.5mv max quiescent current: 9ma max wide supply range: 2.5v to 15v available in 10-lead msop and 10-lead (3mm 3mm) dfn packages instrumentation amplifier current sense amplifier video difference amplifier automatic test equipment high slew rate differential gain of 1 features applicatio s u typical applicatio u descriptio u the lt ? 1995 is a high speed, high slew rate, gain select- able amplifier with excellent dc performance. gains from C7 to 8 with a gain accuracy of 0.2% can be achieved using no external components. the device is particularly well suited for use as a difference amplifier, where the excellent resistor matching results in a typical common mode rejection ratio of 79db. the amplifier is a single gain stage design similar to the lt1363 and features superb slewing and settling charac- teristics. input offset of the internal operational amplifier is less than 2.5mv and the slew rate is 1000v/ s. the output can drive a 150 ? load to 2.5v on 5v supplies, making it useful in cable driver applications. the resistors have excellent matching, 0.2% maximum at room temperature and 0.3% from C40 c to 85 c. the temperature coefficient of the resistors is typically C30ppm/ c. the resistors are extremely linear with volt- age, resulting in a gain nonlinearity of 10ppm. the lt1995 is fully specified at 2.5v, 5v and 15v sup- plies and from C40 c to 85 c. the device is available in space saving 10-lead msop and 10-lead (3mm 3mm) dfn packages. for a micropower precision amplifier with precision resistors, see the lt1991 and lt1996. large-signal transient (g = 1) 1995 ta01b
2 lt1995 1995fb symbol parameter conditions v supply min typ max units ge gain error v out = 12v, r l = 1k, g = 1 15v 0.05 0.2 % v out = 12v, r l = 1k, g = 2 15v 0.05 0.2 % v out = 12v, r l = 1k, g = 4 15v 0.05 0.2 % v out = 5v, r l = 150 ? , g = 1 15v 0.05 0.25 % v out = 2.5v, r l = 500 ? , g = 1 5v 0.05 0.2 % v out = 2.5v, r l = 150 ? , g = 1 5v 0.05 0.25 % gnl gain nonlinearity v out = 12v, r l = 1k, g = 1 15v 10 ppm v os input offset voltage g = 1 (ms10) 15v 1 5 mv referred to input (note 7) g = 1 (dd10) 15v 1.5 9 mv g = 2 (ms10) 15v 0.7 4 mv g = 2 (dd10) 15v 1.2 6.8 mv g = 4 (ms10) 15v 0.6 3.75 mv g = 4 (dd10) 15v 0.9 5.6 mv g = 1 (ms10) 5v 1 5 mv g = 1 (dd10) 5v 1.4 9 mv g = 1 (ms10) 2.5v 1 5 mv g = 1 (dd10) 2.5v 1.3 9 mv difference amplifier configuration. t a = 25 c, v ref = v cm = 0v and unused gain pins are unconnected, unless otherwise noted. electrical characteristics total supply voltage (v + to v C ) .............................. 36v input current (note 2) ....................................... 10ma output short-circuit duration (note 3) ........... indefinite operating temperature range (note 4) .. C 40 c to 85 c specified temperature range (note 5) ... C 40 c to 85 c absolute m axi m u m ratings w ww u (note 1) storage temperature range ms package .................................... C 65 c to 150 c dd package ..................................... C 65 c to 125 c maximum junction temperature ms package ..................................................... 150 c dd package ..................................................... 125 c lead temperature (soldering, 10 sec).................. 300 c order part number lt1995cdd lt1995idd t jmax = 125 c, ja = 160 c/w (note 6) exposed pad internally connected to v s C pcb connection optional package/order i n for m atio n w u u consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grades are identified by a label on the shipping container. top view dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 m1 m2 m4 v s + out p1 p2 p4 v s C ref + C dd part marking* lbjf lbjf order part number LT1995CMS lt1995ims ms part marking* ltbjd ltbjd 1 2 3 4 5 p1 p2 p4 v s C ref 10 9 8 7 6 m1 m2 m4 v s + out top view ms package 10-lead plastic msop + C t jmax = 150 c, ja = 160 c/w (note 6) order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/
3 lt1995 1995fb symbol parameter conditions v supply min typ max units v os_oa op amp input offset voltage g = 1 (ms10) 2.5v, 5v, 15v 0.5 2.5 mv (note 10) g = 1 (dd10) 2.5v, 5v, 15v 0.75 4.5 mv e n input noise voltage g = 1, f = 10khz 2.5v to 15v 27 nv/ hz g = 2, f = 10khz 2.5v to 15v 18 nv/ hz g = 4, f = 10khz 2.5v to 15v 14 nv/ hz r in common mode input resistance v cm = 15v, g = 1 15v 4 k ? c in input capacitance 15v 2.5 pf input voltage range g = 1 15v 15 15.5 v 5v 5 5.5 v 2.5v 1 1.5 v cmrr common mode rejection ratio g = 1, v cm = 15v 15v 65 79 db referred to input g = 2, v cm = 15v 15v 71 84 db g = 4, v cm = 15v 15v 75 87 db g = 1, v cm = 5v 5v 65 73 db g = 1, v cm = 1v 2.5v 61 68 db psrr power supply rejection ratio p1 = m1 = 0v, g = 1, v s = 2.5v to 15v 78 87 db v out output voltage swing r l = 1k 15v 13.5 14 v r l = 500 ? 15v 13 13.5 v r l = 500 ? 5v 3.5 4v r l = 500 ? 2.5v 1.3 2v i sc short-circuit current g = 1 15v 70 120 ma sr slew rate g = C2, v out = 12v, p2 = 0v 15v 750 1000 v/ s measured at v out = 10v g = C2, v out = 3.5v, p2 = 0v 5v 450 v/ s measured at v out = 2v fpbw full power bandwidth 10v peak, g = C2 (note 8) 15v 16 mhz 3v peak, g = C2 (note 8) 5v 24 mhz hd total harmonic distortion g = 1, f = 1mhz, r l = 1k, v out = 2v p-p 15v C81 db C3db bandwidth g = 1 15v 32 mhz 5v 25 mhz 2.5v 21 mhz t r , t f rise time, fall time 10% to 90%, 0.1v, g = 1 15v 10 ns 5v 15 ns os overshoot 0.1v, g = 1, c l = 10pf 15v 30 % 5v 30 % t pd propagation delay 50% v in to 50% v out , 0.1v, g = 1 15v 9 ns 5v 11 ns t s settling time 10v step, 0.1%, g = 1 15v 100 ns 5v step, 0.1%, g = 1 5v 110 ns ? g differential gain g = 2, r l = 150 ? 15v 0.06 % ? differential phase g = 2, r l = 150 ? 15v 0.15 deg r out output resistance f = 1mhz, g = 1 15v 1.5 ? i s supply current g = 1 15v 7.1 9.0 ma 5v 6.7 8.5 ma difference amplifier configuration. t a = 25 c, v ref = v cm = 0v and unused gain pins are unconnected, unless otherwise noted. electrical characteristics
4 lt1995 1995fb symbol parameter conditions v supply min typ max units ge gain error v out = 12v, r l = 1k, g = 1 15v 0.05 0.25 % v out = 12v, r l = 1k, g = 2 15v 0.05 0.25 % v out = 12v, r l = 1k, g = 4 15v 0.05 0.25 % v out = 2.5v, r l = 500 ? , g = 1 5v 0.05 0.25 % v out = 2.5v, r l = 150 ? , g = 1 5v 0.05 0.35 % v os input offset voltage g = 1 (ms10) 15v 1.1 6.5 mv referred to input (note 7) g = 1 (dd10) 15v 1.5 11.5 mv g = 2 (ms10) 15v 0.8 5.5 mv g = 2 (dd10) 15v 1.2 9 mv g = 4 (ms10) 15v 0.7 5 mv g = 4 (dd10) 15v 0.9 7.5 mv g = 1 (ms10) 5v 1 6.5 mv g = 1 (dd10) 5v 1.4 11.5 mv g = 1 (ms10) 2.5v 1 6.5 mv g = 1 (dd10) 2.5v 1.3 11.5 mv v os tc input offset voltage drift g = 1 (ms10) 15v 10 26 v/ c referred to input (note 9) g = 1 (dd10) 15v 10 35 v/ c v os_oa op amp input offset voltage g = 1 (ms10) 2.5v, 5v, 15v 0.55 3.25 mv (note 10) g = 1 (dd10) 2.5v, 5v, 15v 0.75 5.75 mv input voltage range g = 1 15v 15 15.5 v 5v 5 5.5 v 2.5v 1 1.5 v cmrr common mode rejection ratio v cm = 15v, g = 1 15v 63 77 db referred to input v cm = 15v, g = 2 15v 69 83 db v cm = 15v, g = 4 15v 73 86 db v cm = 5v, g = 1 5v 62 72 db v cm = 1v, g = 1 2.5v 59 66 db psrr power supply rejection ratio p1 = m1 = 0v, g = 1, v s = 2.5v to 15v 76 86 db v out output voltage swing r l = 1k 15v 13.1 14 v r l = 500 ? 15v 12.6 13.5 v r l = 500 ? 5v 3.4 4v r l = 500 ? 2.5v 1.2 2v i sc short-circuit current g = 1 15v 55 115 ma sr slew rate g = C2, v out = 12v, p2 = 0v 15v 600 900 v/ s measured at v out = 10v i s supply current g = 1 15v 7.9 10.5 ma 5v 7.4 9.9 ma the denotes the specifications which apply over the 0 c t a 70 c. difference amplifier configuration. v ref = v cm = 0v and unused gain pins are unconnected, unless otherwise noted. electrical characteristics the denotes the specifications which apply over the ?0 c t a 85 c. difference amplifier configuration. v ref = v cm = 0v and unused gain pins are unconnected, unless otherwise noted. symbol parameter conditions v supply min typ max units ge gain error v out = 12v, r l = 1k, g = 1 15v 0.05 0.3 % v out = 12v, r l = 1k, g = 2 15v 0.05 0.35 % v out = 12v, r l = 1k, g = 4 15v 0.05 0.35 % v out = 2.5v, r l = 500 ? , g = 1 5v 0.05 0.3 % v out = 2.5v r l = 150 ? , g = 1 5v 0.05 0.5 %
5 lt1995 1995fb symbol parameter conditions v supply min typ max units v os input offset voltage g = 1 (ms10) 15v 1.2 7.5 mv referred to input (note 7) g = 1 (dd10) 15v 1.6 13 mv g = 2 (ms10) 15v 0.9 6 mv g = 2 (dd10) 15v 1.2 10 mv g = 4 (ms10) 15v 0.7 5.5 mv g = 4 (dd10) 15v 0.9 8.5 mv g = 1 (ms10) 5v 1.1 7.5 mv g = 1 (dd10) 5v 1.4 13 mv g = 1 (ms10) 2.5v 1.1 7.5 mv g = 1 (dd10) 2.5v 1.5 13 mv v os tc input offset voltage drift g = 1 (ms10) 15v 10 26 v/ c referred to input (note 9) g = 1 (dd10) 15v 10 35 v/ c v os_oa op amp input offset voltage g = 1 (ms10) 2.5v, 5v, 15v 0.6 3.75 mv (note 10) g = 1 (dd10) 2.5v, 5v, 15v 0.8 6.5 mv input voltage range g = 1 15v 15 15.5 v 5v 5 5.5 v 2.5v 1 1.5 v cmrr common mode rejection ratio v cm = 15v, g = 1 15v 62 77 db referred to input v cm = 15v, g = 2 15v 68 83 db v cm = 15v, g = 4 15v 72 86 db v cm = 5v, g = 1 5v 61 72 db v cm = 1v, g = 1 2.5v 57 66 db psrr power supply rejection ratio p1 = m1 = 0v, g = 1, v s = 2.5v to 15v 74 86 db v out output voltage swing r l = 1k 15v 13 14 v r l = 500 ? 15v 12.5 13.5 v r l = 500 ? 5v 3.3 4v r l = 500 ? 2.5v 1.1 2v i sc short-circuit current g = 1 15v 50 105 ma sr slew rate g = C2, v out = 12v, p2 = 0v 15v 550 900 v/ s measured at v out = 10v i s supply current g = 1 15v 8.0 11.0 ma 5v 7.6 10.4 ma the denotes the specifications which apply over the ?0 c t a 85 c. difference amplifier configuration. v ref = v cm = 0v and unused gain pins are unconnected, unless otherwise noted. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the inputs are protected by diodes connected to v s + and v s C . if an input goes beyond the supply range, the input current should be limited to 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: the lt1995c and lt1995i are guaranteed functional over the operating temperature range of C40 c to 85 c. note 5: the lt1995c is guaranteed to meet specified performance from 0 c to 70 c. the lt1995c is designed, characterized and expected to meet specified performance from C40 c to 85 c but is not tested or qa sampled at these temperatures. the lt1995i is guaranteed to meet specified performance from C40 c to 85 c. note 6: thermal resistance ( ja ) varies with the amount of pc board metal connected to the leads. the specified values are for short traces connected to the leads. if desired, the thermal resistance can be reduced slightly in the ms package to about 130 c/w by connecting the used leads to a larger metal area. a substantial reduction in thermal resistance down to about 50 c/w can be achieved by connecting the exposed pad on the bottom of the dd package to a large pc board metal area which is either open-circuited or connected to v s C . note 7: input offset voltage is pulse tested and is exclusive of warm-up drift. v os and v os tc refer to the input offset of the difference amplifier configuration. the equivalent input offset of the internal op amp can be calculated from v os_oa = v os ? g/(g +1). note 8: full power bandwidth is calculated from the slew rate measure- ment: fpbw = sr/2 v p . note 9: this parameter is not 100% tested. note 10: the input offset of the internal op amp is calculated from the input offset voltage: v os_oa = v os ? g/(g +1).
6 lt1995 1995fb frequency (hz) 1 output impedacne ( ? ) 10 100 1000 10k 1m 10m 100m 1995 g09 0.1 100k v s = 15v t a = 25 c g = 7 g = 1 temperature ( c) C50 output short-circuit current (ma) 80 100 120 25 75 1995 g08 60 40 C25 0 50 100 125 20 0 v s = 5v source sink time after power on (minutes) 0 0 change in input offset voltage ( v) 50 100 150 200 250 300 1234 1995 g07 5 g = 1 g = 7 v s = 15v t a = 25 c ms package output current (ma) C50 output voltage (v) 1995 g06 50 25 C25 0 v C 0.5 1.0 1.5 2.0 3.0 2.5 C1.5 C2.0 C1.0 v + C0.5 v s = 5v 25 c C40 c 85 c C40 c 85 c 25 c supply voltage ( v) 0 output voltage (v) 1995 g05 20 5 10 15 v C 0.5 1.0 1.5 C1.5 C1.0 v + C0.5 t a = 25 c r l = 500 ? r l = 1k r l = 500 ? r l = 1k resistive load (k ? ) 0 change in gain error (%) 0.05 0.04 0.03 0.01 0.02 0 C0.01 C0.02 C0.03 C0.04 C0.05 8 1995 g04 2 13579 4 6 10 g = 7 g = 2 v s = 15v t a = 25 c v out = 12v g = 4 g = 1 frequency (khz) 10 input voltage noise (nv/ hz) 100 0.01 1 10 100 1995 g03 1 0.1 1000 v s = 15v t a = 25 c g = 1 g = 7 g = 2 g = 4 supply voltage ( v) 0 supply current (ma) 4 6 20 1995 g02 2 0 5 10 15 10 8 t a = 125 c t a = 25 c t a = C55 c input offset voltage (mv) C3.5 0 number of units (%) 10 25 C1.5 0.5 1.5 1995 g01 5 20 15 C2.5 C0.5 2.5 3.5 v s = 15v v cm = 0v g = 1 ms package typical perfor a ce characteristics uw supply current vs supply voltage and temperature input noise spectral density change in gain error vs resistive load output voltage swing vs supply voltage output voltage swing vs load current (difference amplifier configuration) warm-up drift vs time output short-circuit current vs temperature output impedance vs frequency v os distribution
7 lt1995 1995fb frequency (hz) 1k common mode rejection ratio (db) 60 80 100 10m 1995 g18 40 20 50 70 90 30 10 0 10k 100k 1m 100m v s = 15v t a = 25 c g = 1 frequency (mhz) C15 0 C5 C10 20 15 10 5 1995 g17 voltage magnitude (db) 1 100 10 v s = 15v t a = 25 c r l = g = C1 c = 200pf c = 100pf c = 50pf c = 0pf frequency (hz) 100k C2 gain (db) 0 2 4 6 1m 10m 100m 1995 g16 C4 C6 C8 C10 8 10 t a = 25 c r l = 1k 2.5v 15v 5v temperature ( c) C50 20 25 35 25 75 1995 g15 C25 0 50 100 125 30 50 45 40 35 C3db bandwidth (mhz) overshoot (%) C3db bandwidth overshoot c l = 15pf v s = 15v v s = 15v v s = 5v v s = 5v g = C1 supply voltage ( v) 0 C3db bandwidth (mhz) overshoot (%) 20 25 30 16 1995 g14 4 8 12 218 6 10 14 42 41 40 40 35 t a = 25 c g = C1 C3db bandwidth overshoot c l = 15pf gain (v/v) 1 0 settling time (ns) 20 60 80 100 140 2 3 5 1995 g13 40 120 7 8 46 v s = 15v t a = 25 c ? v out = 10v r l = 1k 0.1% settling settling time (ns) 0 output step (v) 10 8 6 2 4 0 C2 C4 C6 C8 C10 140 1995 g12 20 40 80 120 60 100 160 10mv 1mv 10mv 1mv v s = 15v t a = 25 c r l = 1k g = C1 settling time (ns) 0 output step (v) 10 8 6 2 4 0 C2 C4 C6 C8 C10 140 1995 g11 20 40 80 120 160 60 100 180 10mv 1mv 10mv 1mv v s = 15v t a = 25 c r l = 1k g = 1 frequency (hz) gain (db) 20 18 16 14 12 10 8 6 4 2 0 C2 C4 C6 C8 C10 10k 1m 10m 100m 1995 g10 100k g = 7 g = 4 g = 2 g = 1 v s = 15v t a = 25 c r l = 1k frequency response vs supply voltage (g = 1, g = 1) frequency response vs capacitive load common mode rejection ratio vs frequency typical perfor a ce characteristics uw (difference amplifier configuration) gain vs frequency ?db bandwidth and overshoot vs supply voltage ?db bandwidth and overshoot vs temperature settling time vs output step (non-inverting) settling time vs output step (inverting) settling time vs gain (non-inverting)
8 lt1995 1995fb supply voltage (v) 0 0 differential phase (deg) differential gain (%) 0.2 0.6 0.8 1.0 25 30 0.5 1995 g27 0.4 5 101520 0.2 0.1 0 0.3 0.4 differential gain differential phase t a = 25 c r l = 150 ? g = 2 frequency (mhz) 0.1 C100 distortion (dbc) C90 C80 C70 C60 C40 110 1995 g26 C50 2nd harmonic 3rd harmonic v s = 15v v out = 2v p-p r l = 500 ? g = 2 frequency (mhz) 0.1 1 10 output voltage (v p-p ) 10 9 8 7 6 5 4 3 2 1 0 1995 g25 g = 1 g = C1 v s = 5v t a = 25 c hd <2% frequency (mhz) 0.1 1 10 output voltage (v p-p ) 30 25 20 15 10 5 0 1995 g24 g = 1 g = C1 v s = 15v t a = 25 c hd <2% frequency (khz) 0.01 0.0001 total harmonic distortion (%) 0.001 0.01 1 0.1 10 100 1995 g23 g = C1 g = 1 t a = 25 c v o = 3v rms r l = 500 ? input level (v p-p ) 0 0 slew rate (v/ s) 200 600 800 1000 1400 2 10 14 1995 g22 400 1200 8 18 20 4 6 12 16 t a = 25 c v s = 15v g = C1 temperature ( c) C50 0 slew rate (v/ s) 200 600 800 1000 50 1800 1995 g21 400 0 C25 75 100 25 125 1200 1400 1600 g = C2 v s = 15v v out = 27v p-p v s = 5v v out = 7v p-p supply voltage ( v) 0 slew rate (v/ s) 600 800 1000 1995 g20 400 200 0 510 1200 1400 1600 15 t a = 25 c g = C1 v out = v s + C v s C C 3v p-p frequency (hz) 1k power supply rejection ratio (db) 50 +psrr 70 90 10m 1995 g19 30 10 40 60 80 20 0 C10 10k 100k 1m 100m Cpsrr v s = 15v t a = 25 c g = 1 typical perfor a ce characteristics uw (difference amplifier configuration) 2nd and 3rd harmonic distortion vs frequency differential gain and phase vs supply voltage slew rate vs supply voltage power supply rejection ratio vs frequency slew rate vs temperature slew rate vs input level total harmonic distortion vs frequency undistorted output swing vs frequency ( 15v) undistorted output swing vs frequency ( 5v)
9 lt1995 1995fb capacitive load 10pf 40 overshoot (%) 50 60 70 80 100pf 1000pf 0.01 f 0.1 f1 f 1995 g29 30 20 10 0 90 100 g = 1 g = 2 g = 4 g = 7 v s = 5v t a = 25 c r l = capacitive load 10pf 40 overshoot (%) 50 60 70 80 100pf 1000pf 0.01 f 0.1 f1 f 1995 g28 30 20 10 0 90 100 v s = 15v t a = 25 c r l = g = 1 g = 2 g = 4 g = 7 large-signal transient (g = 1) large-signal transient (g = ?) large-signal transient (noninverting, g = 1, c l = 100pf) v s = 15v 100ns/div 1995 g33 r l = 1k v s = 15v 100ns/div 1995 g34 r l = 1k v s = 15v 100ns/div 1995 g35 r l = 1k typical perfor a ce characteristics uw (difference amplifier configuration) small-signal transient (g = 1) small-signal transient (g = ?) small-signal transient (noninverting, g = 1, c l = 100pf) v s = 15v 100ns/div 1995 g30 r l = 1k v s = 15v 100ns/div 1995 g31 r l = 1k v s = 15v 100ns/div 1995 g32 r l = 1k capacitive load handling capacitive load handling
10 lt1995 1995fb uu u pi fu ctio s p1 (pin 1): noninverting gain-of-1 input. connects a 4k internal resistor to the op amps noninverting input. p2 (pin 2): noninverting gain-of-2 input. connects a 2k internal resistor to the op amps noninverting input. p4 (pin 3): noninverting gain-of-4 input. connects a 1k internal resistor to the op amps noninverting input. v s (pin 4): negative supply voltage. ref (pin 5): reference voltage. sets the output level when the difference between the inputs is zero. connects a 4k internal resistor to the op amps non inverting input. out (pin 6): output voltage. v out = v ref + 1 ? (v p1 C v m1 ) + 2 ? (v p2 C v m2 ) + 4 ? (v p4 C v m4 ). v s + (pin 7): positive supply voltage. m4 (pin 8): inverting gain-of-4 input. connects a 1k internal resistor to the op amps inverting input. m2 (pin 9): inverting gain-of-2 input. connects a 2k internal resistor to the op amps inverting input. m1 (pin 10): inverting gain-of-1 input. connects a 4k internal resistor to the op amps inverting input. (difference amplifier configuration)
11 lt1995 1995fb block diagra w 3 p4 r p4 = 1k 2 p2 r p2 = 2k 1 p1 r p1 = 4k 8 m4 r m4 = 1k 9 m2 r m2 = 2k 10 5 6 m1 ref 7 v s + 4 v s C out 1995 bd r m1 = 4k r fb = 4k r fb = 4k 0.3pf C + 0.3pf 0.5pf 0.5pf applicatio s i for atio wu uu configuration flexibility the lt1995 combines a high speed precision operational amplifier with eight ratio-matched on-chip resistors. the resistor configuration and pinout of the device is shown in the block diagram. the topology is extremely versatile and provides for simple realizations of most classic functional configurations including difference amplifiers, inverting gain stages, noninverting gain stages (including hi-z input buffers) and summing amplifiers. the lt1995 deliv- ers load currents of at least 30ma, making it ideal for cable driving applications as well. the input voltage range depends on gain and configura- tion. esd diodes will clamp any input voltage that exceeds the supply potentials by more than several tenths of a volt; and the internal op amp input ports must remain at least 1.75v within the rails to assure normal operation of the part. the output will swing to within one and a half volts of the rails, which in low supply voltage and high gain configurations will create a limitation on the usable input range. it should be noted that while the internal op amp can withstand transient differential input voltages of up to 10v without damage, this does generate large supply current increases (tens of ma) as required for high slew rates. if the device is used with sustained differential input across the internal op amp (such as when the output is clipping), the average supply current will increase, excessive power dissipation will result, and the part may be damaged (i.e., the lt1995 is not recommended for use in comparator applications or with the output clipped). difference amplifier the lt1995 can be connected as a classic difference amplifier with an output function given by: v out = g ? (v in + C v in C ) + v ref
12 lt1995 1995fb applicatio s i for atio wu uu as shown in figure 1, the options for fixed gain g include: 1, 1.33, 1.67, 2, 3, 4, 5, 6 and 7, all achieved by pin- strapping alone. with split-supply applications where the output is to be ground referenced, the v ref input is simply tied to ground. the input common mode voltage is rejected by the high cmrr of the part within the usable input range. inverting gain amplifier the lt1995 can be connected as an inverting gain ampli- fier with an output function given by: v out = C(g ? v in C ) + v ref as shown in figure 1, the options for fixed gain g include: 1, 1.33, 1.67, 2, 3, 4, 5, 6 and 7, all achieved by pin strapping alone. the v in + connection used in the differ- ence amp configuration is simply tied to ground (or a low impedance potential equal to the input signal bias to create an input virtual ground). with split-supply applications where the output is to be ground referenced, the v ref input is simply tied to ground as well. noninverting gain buffer amplifier the lt1995 can be connected as a high input impedance noninverting gain buffer amplifier with an output function given by: v out = g ? v in as shown in figure 2, the options for fixed gain g include: 1, 1.14, 1.2, 1.33, 1.4, 1.6, 2, 2.33, 2.66, 3, 4, 5, 6, 7 and 8, all achieved by pin strapping alone. with single supply applications, the grounded m input pins may be tied to a low impedance potential equal to the input signal bias to create a virtual ground for both the input and output signals. while there is no input attenuation from v in to the internal noninverting op amp port in these configurations, the p connections vary to minimize offset by providing balanced input resistances to the internal op amp. noninverting gain amplifier input attenuation the lt1995 can also be connected as a noninverting gain amplifier having an input attenuation network to provide a wide range of additional noninverting gain options. in combination with the feedback configurations for gains of g shown in figure 2 (connections to the m inputs), the p and ref inputs may be connected to form several resistor divider attenuation ratios a, so that a compound output function is given by: v out = a ? g ? v in as shown in figure 3, the options for fixed attenuation a include 0.875, 0.857, 0.833, 0.8, 0.75, 0.714, 0.667, 0.625 and 0.571, all achieved by pin strapping alone. with just the attenuation configurations of figure 3 and the feed- back configurations of figure 2, seventy-three unique composite gains in the range of 1 to 8 are available (many options for gain below unity also exist). figure 3 does not include the additional pin-strap configurations offering a values of 0.5, 0.429, 0.375, 0.333, 0.286, 0.25, 0.2, 0.167, 0.143 and 0.125, as these values tend to compromise the low noise performance of the part and dont generally contribute many more unique gain options. it should be noted that with these configurations some degree of imbalance will generally exist between the effective resis- tances r p and r m seen by the internal op amp input ports, noninverting and inverting, respectively. depending on the specific combination of a and g, the following dc offset error due to op amp input bias current (i b ) should be anticipated: the i b of the internal op amp is typically 0.6 a and is prepackage tested to a limit of 2 a. additional output-referred offset = i b ? (r p C r m ) ? g. in some configurations, this could be as much as 1.7mv ? g additional output offset. the i os of the internal op amp is typically 120na and is prepackage tested to a limit of 350na. the electrical characteristics table includes the effects of i b and i os .
13 lt1995 1995fb applicatio s i for atio wu uu m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 1.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 2.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 3.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 1.33 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 4.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 5.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 7.00 ref 1995 f01 m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 6.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v in C v in + v out v ref Cv +v 6 4 5 7 lt1995 g = 1.67 ref figure 1. difference (and inverting) amplifier configurations table 1. pin use, input range, input resistance, bandwidth in difference amplifier configuration gain 1 2 3 4 5 6 7 use of p1/m1 v in open v in open v in open v in use of p2/m2 open v in v in open open v in v in use of p4/m4 open open open v in v in v in v in positive input range: v ref = 0v, v s = 15v 15v 15v 15v 15v 15v 15v 15v positive input range: v ref = 0v, v s = 5v 5v 4.88v 4.33v 4.06v 3.9v 3.79v 3.71v positive input range: v ref = 0v, v s = 2.5v 1.5v 1.13v 1v 0.94v 0.9v 0.88v 0.86v positive input resistance 8k 6k 5.33k 5k 4.8k 4.67k 4.57k minus input resistance 4k 2k 1.33k 1k 800 ? 667 ? 571 ? ref input resistance 8k 6k 5.33k 5k 4.8k 4.67k 4.57k input common mode resistance, v ref = 0v 4k 3k 2.67k 2.5k 2.4k 2.33k 2.29k input differential mode resistance, v ref = 0v 8k 4k 2.67k 2k 1.6k 1.33k 1.14k C3db bandwidth 32mhz 27mhz 27mhz 23mhz 18mhz 16mhz 15mhz
14 lt1995 1995fb m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 1.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 1.14 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 1.33 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 1.40 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 1.20 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 1995 f02 7 lt1995 g = 1.60 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 2.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 2.33 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 2.66 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 6.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out 1995 f02b v in Cv +v 6 4 5 7 lt1995 g = 8.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 7.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 3.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 4.00 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in Cv +v 6 4 5 7 lt1995 g = 5.00 ref applicatio s i for atio wu uu figure 2. noninverting buffer amplifier configurations (hi-z input)
15 lt1995 1995fb applicatio s i for atio wu uu ac-coupling methods for single supply operation the lt1995 can be used in many single-supply applications using ac-coupling without additional biasing circuitry. ac-coupling the lt1995 in a difference amplifier configu- ration (as in figure 1) is a simple matter of adding coupling capacitors to each input and the output as shown in the example of figure 5. the input voltage v bias applied to the ref pin establishes the quiescent voltage on the input and output pins. the v bias signal should have a low source impedance to avoid degrading the cmrr (0.5 ? for 1db cmrr change typically). m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.875 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.833 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.857 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.800 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.714 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.750 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 *configure m inputs for desired g parameter; refer to figure 2 for connections a = 0.667 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 1995 f03 7 lt1995 a = 0.571 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out v in * Cv +v 6 4 5 7 lt1995 a = 0.625 ref figure 3. noninverting amplifier input attenuation configurations (a > 0.5) 1 1 2 4 5 6 8 1995 f04 3 7 73 gain combination noninverting gain figure 4. unique noninverting gain configurations
16 lt1995 1995fb using the lt1995 as an ac-coupled inverting gain stage, the ref pin and the relevant p inputs may all be driven from a v bias source as depicted in the example of figure 6, thus establishing the quiescent voltage on the input and output pins. the v bias signal will only have to source the bias current (i b ) of the noninverting input of the internal op amp (0.6 a typically), so a high v bias source impedance (r s ) will cause the quiescent level of the amplifier output to deviate from the intended v bias level by i b ? r s . in operation as a noninverting gain stage, the p and ref inputs may be configured as a supply splitter, thereby providing a convenient mid-supply operating point. fig- ure 7 illustrates the three attenuation configurations that generate 50% mid-supply biasing levels with no external components aside from the desired coupling capacitors. as with the dc-coupled input attenuation ratios, a, a compound output function including the feedback gain parameter g is given by: v out = a ? g ? v in applicatio s i for atio wu uu m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out c out v bias v in C +v 6 4 5 1995 f06 7 lt1995 ref c in figure 6. ac-coupled inverting gain amplifier general configuration (g = 5 example) m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out c out c in v in * +v 6 4 *configure m inputs for desired g parameter; refer to figure 2 for connections. any m inputs shown grounded in figure 2 should instead be capacitively coupled to ground 5 7 lt1995 a = 0.750 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out 1995 f07 c out c in v in * +v 6 4 5 7 lt1995 a = 0.500 ref m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out c out c in v in * +v 6 4 5 7 lt1995 a = 0.667 ref figure 7. ac-coupled noninverting amplifier input attenuation configurations (supply splitting) m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out c out v bias v in + v in C +v 6 4 5 1995 f05 7 lt1995 ref c in c in figure 5. ac-coupled difference amplifier general configuation (g = 5 example)
17 lt1995 1995fb applicatio s i for atio wu uu if one of the a parameter configurations in figure 3 is preferred, or the use of an external biasing source is desired, the p and ref input connections shown grounded in a figure 3 circuit may be instead driven by a v bias voltage to establish a quiescent operating point for the input and output pins. the v in connections of the figure 3 circuit are then driven via a coupling capacitor. any grounded m inputs for the desired g configuration (refer to figure 2) must be individually or collectively ac-coupled to ground. figure 8 illustrates a complete example circuit of an externally biased ac-coupled nonin- verting amplifier. the v bias source impedance should be low (a few ohms) to avoid degrading the inherent accuracy of the lt1995. 0.013% of additional gain error for each ohm of resistance on the ref pin is typical. at room temperature, and to within 0.3% over tempera- ture. the temperature coefficient of the resistors is typi- cally C30ppm/ c. the resistors have been sized to accom- modate 15v across each resistor, or in terms of power, 225mw in the 1k resistors, 113mw in the 2k resistors, and 56mw in the 4k resistors. power supply considerations as with any high speed amplifier, the lt1995 printed circuit layout should utilize good power supply decoupling practices. good decoupling will typically consist of one or more capacitors employing the shortest practical inter- connection traces and direct vias to a ground plane. this practice minimizes inductance at the supply pins so the impedance is low at the operating frequencies of the part, thereby suppressing feedback or crosstalk artifacts that might otherwise lead to extended settling times, fre- quency response anomalies, or even oscillation. for high speed parts like the lt1995, 10nf ceramics are suitable close-in bypass capacitors, and if high currents are being delivered to a load, additional 4.7 f capacitors in parallel can help minimize induced power supply transients. because unused input pins are connected via resistors to the input of the op amp, excessive capacitances on these pins will degrade the rise time, slew rate, and step re- sponse of the output. therefore, these pins should not be connected to large traces which would add capacitance when not in use. since the lt1995 has a wide operating supply voltage range, it is possible to place the part in situations of relatively high power dissipation that may cause excessive die temperatures to develop. maximum junction tempera- ture (t j ) is calculated from the ambient temperature (t a ) m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out configuration example: a = 0.625 g = 6.00 (v out /v in = 3.75v) c out v bias v in +v 6 4 5 1995 f08 7 lt1995 ref c byp c in figure 8. ac-coupled noninverting amplifier with external bias source (example) resistor considerations the resistors in the lt1995 are very well matched, low temperature coefficient thin film based elements. although their absolute tolerance is fairly wide (typically 5% but 25% worst case), the resistor matching is to within 0.2%
18 lt1995 1995fb applicatio s i for atio wu uu and power dissipation (p d ) as follows for a nominal pcb layout: t j = t a + (p d ? ja ) for example, in order to maintain a maximum junction temperature of 150 c at 85 c ambient in an ms10 pack- age, the power must be limited to 0.4w. it is important to note that when operating at 15v supplies, the quiescent current alone will typically account for 0.24w, so careful thermal management may be required if high load cur- rents and high supply voltages are involved. by additional copper area contact to the supply pins or effective thermal coupling to extended ground plane(s), the thermal imped- ance can be reduced to 130 c/w in the ms10 package. a substantial reduction in thermal impedance of the dd10 package down to about 50 c/w can be achieved by connecting the exposed pad on the bottom of the package to a large pc board metal area which is either open- circuited or connected to v s C . m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out 10nf 47 ? v in +v Cv 6 4 configuration example: g = 1.14 5 1995 f09 7 lt1995 ref figure 9. optional frequency compensation network for (1 g 2) frequency compensation the lt1995 comfortably drives heavy resistive loads such as back-terminated cables and provides nicely damped responses for all gain configurations when doing so. small capacitances are included in the on-chip resistor network to optimize bandwidth in the basic difference gain configurations of figure 1. for the noninverting configura- tions of figure 2, where the gain parameter g is 2 or less, significant overshoot can occur when driving light loads. for these low gain cases, providing an rc output network as shown in figure 9 to create an artificial load at high frequency will assure good damping behavior. figure 10. step response of circuit in figure 9
19 lt1995 1995fb 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dd10) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.50 0.05 package outline 0.25 0.05 0.50 bsc msop (ms) 0603 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C 0.27 (.007 C .011) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc u package descriptio ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699)
20 lt1995 1995fb lt1995 g = 1 sense output 100mv/a flag output 4a limit 15v 15v to C15v 0.1 ? i 10k 1995 ta05 10k lt6700-3 C + 400mv C15v ref p1 m1 r s 0.2 ? 10nf lt1995 g = 5 C15v C15v 15v 10nf 15v i out v in 1k 1995 ta04 100 ? C + lt1880 ref irf9530 m4 m1 p1 p4 i out = v in 5 ? r s m1 p1 lt1995 g = C1 lt1790-1.25 C1.25v C3v ref 1995 ta03 3v 1 f 1.25v m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out i in = 600na 1995 ta02 v in Cv +v 6 4 5 7 lt1995 ref ? linear technology corporation 2004 lt/lt 0805 rev b ? printed in the usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com high input impedance precision gain of 2 configuration typical applicatio s u tracking negative reference 0a to 2a current source current sense with alarm part number description comments lt1363 70mhz, 1000v/ s op amp 50ns settling time to 0.1%, c load stable lt1990 high voltage difference amplifier 250v common mode voltage, micropower, pin selectable g = 1, 10 lt1991 precision gain selectable amplifier micropower, precision, pin selectable g = C13 to 14 ltc1992 fully differential amplifier differential input and output, rail-to-rail output, i s = 1.2ma, c load stable to 10,000pf, adjustable common mode voltage ltc6910-x programmable gain amplifiers 3 gain configurations, rail-to-rail input and output related parts 10k m4 m2 m1 p1 p2 p4 8 9 10 1 2 3 v out f C3db = 27mhz r l = 75 ? 220 f 47 f 47 f v in 5v 6 4 5 1995 ta06 7 lt1995 + + + 75 ? single supply video line driver


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